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  www.lansdale.com ML13156 wideband fm if system page 1 of 21 issue a legacy device: motorola mc13156 the ML13156 is a wideband fm if subsystem targeted at high per- formance data and analog applications. the ML13156 has an onboard grounded collector vco transistor that may be used with a fundamen- tal or overtone crystal in single channel operation or with a pll in multichannel operation. the mixer is useful to 500 mhz and may be used in a balanceddifferential, or singleended configuration. the if amplifier is split to accommodate two low cost cascaded filters. rssi output is derived by summing the output of both if sections. a preci- sion data shaper has a hold function to preset the shaper for fast recov- ery of new data. applications for the ML13156 include ct?, wideband data links and other radio systems utilizing gmsk, fsk, or fm modulation. 2.0 to 6.0 vdc operation typical sensitivity at 200 mhz of 2.0 v for 12 db sinad rssi dynamic range typically 80 db high performance data shaper for enhanced ct2 operation internal 330 and 1.4 k terminations for 10.7 mhz and 455 khz filters split if for improved filtering and extended rssi range 3rd order intercept (input) of 25 dbm (input matched) operating temperature range t a = 40 to +85c so 24w = -6p plastic package case 751e (so-24l) 24 1 qfp 32 = -8p plastic qfp package case 873 32 1 cross reference/ordering information motorola so 24w mc13156dw ML13156-6p qfp 32 mc13156fb ML13156-8p lansdale package note : lansdale lead free ( pb ) product, as it becomes available, will be identified by a part number prefix change from ml to mle . pin connections function rf input 1 rf input 2 mixer output v cc1 if amp input if amp decoupling 1 if amp decoupling 2 v cc connect (n/c internal) if amp output v cc2 limiter if input limiter decoupling 1 limiter decoupling 2 v cc connect (n/c internal) quad coil demodulator output data slicer input v cc connect (n/c internal) data slicer ground data slicer output data slicer hold v ee2 rssi output/carrier detect in carrier detect output v ee1 and substrate lo emitter lo base v cc connect (n/c internal) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 31 32 1 2 3 4 5 6 7 8 9 10 11 12, 13, 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28, 29, 30 so?4l qfp 11 simplified block diagram 18 19 20 22 13 14 15 16 17 21 23 24 12 10 9 8 7 6 5 4 3 2 1 lim dec 2 lim dec 1 lim in v cc2 if out if dec 2 if dec 1 if in v cc1 mix out rf in 2 rf in 1 quad coil demod ds in ds gnd data out ds hold v ee2 rssi car det v ee1 lo emit lo in bias 5.0 pf data slicer lim amp if amp bias mixer note : pin numbers shown for soic package only. refer to pin assignments table. this device contains 197 active transistors.
ML13156 lansdale semiconductor, inc. maximum ratings rating pin symbol value unit power supply voltage 16, 19, 22 v ee(max) ?.5 vdc junction temperature t j(max) 150 c storage temperature range t stg ?5 to +150 c notes: 1. devices should not be operated at or outside these values. the "recommended operating conditions" table provides for actual device operation. recommended operating conditions rating pin symbol value unit power supply voltage @ t a = 25 c 4, 9 v cc 0 (ground) vdc ?0 c t a +85 c 16, 19, 22 v ee ?.0 to ?.0 input frequency 1, 2 f in 500 mhz ambient temperature range t a ?0 to +85 c input signal level 1, 2 v in 200 mvrms dc electrical characteristics (t a = 25 c, v cc1 = v cc2 = 0, no input signal.) characteristic pin symbol min typ max unit total drain current (see figure 2) 19, 22 i total ma v ee = ?.0 vdc 4.8 v ee = ?.0 vdc 3.0 5.0 8.0 v ee = ?.0 vdc 5.2 v ee = ?.0 vdc 5.4 drain current, i 22 (see figure 3) 22 i 22 ma v ee = ?.0 vdc 3.0 v ee = ?.0 vdc 3.1 v ee = ?.0 vdc 3.3 v ee = ?.0 vdc 3.4 drain current, i 19 (see figure 3) 19 i 19 ma v ee = ?.0 vdc 1.8 v ee = ?.0 vdc 1.9 v ee = ?.0 vdc 1.9 v ee = ?.0 vdc 2.0 data slicer (input voltage referenced to v ee = ?.0 vdc, no input signal; see figure 15.) input threshold voltage (high v in ) 15 v 15 1.0 1.1 1.2 vdc output current (low v in ) 17 i 17 1.7 ma data slicer enabled (no hold) v 15 > 1.1 vdc v 18 = 0 vdc ac electrical characteristics (t a = 25 c, v ee = ?.0 vdc, f rf = 130 mhz, f lo = 140.7 mhz, figure 1 test circuit, unless otherwise specified.) characteristic pin symbol min typ max unit 12 db sinad sensitivity (see figures 17, 23) 1, 14 ?00 dbm f in = 144.45 mhz; f mod = 1.0 khz; f dev = 75 khz mixer conversion gain 1, 3 22 db p in = ?7 dbm (figure 4) mixer input impedance 1, 2 r p 1.0 k single?nded (table 1) c p 4.0 pf mixer output impedance 3 330 if amplifier section if rssi slope (figure 6) 20 0.2 0.4 0.6 a/db if gain (figure 5) 5, 8 39 db input impedance 5 1.4 k output impedance 8 290 www.lansdale.com page 2 of 21 issue a
lansdale semiconductor, inc. ML13156 ac electrical characteristics (continued) (t a = 25 c, v ee = ?.0 vdc, f rf = 130 mhz, f lo = 140.7 mhz, figure 1 test circuit, unless otherwise specified.) characteristic unit max typ min symbol pin limiting amplifier section limiter rssi slope (figure 7) 20 0.2 0.4 0.6 a/db limiter gain 55 db input impedance 10 1.4 k carrier detect output current ?carrier detect (high v in ) 21 0 a output current ?carrier detect (low v in ) 21 3.0 ma input threshold voltage ?carrier detect 20 0.9 1.2 1.4 vdc input voltage referenced to v ee = ?.0 vdc figure 1. test circuit 11 20 22 17 24 12 10 9 8 7 6 3 bias 5.0 p data slicer lim amp if amp bias 23 21 1 2 5 mixer v ee mixer output rf input 130mhz 330 1.0 n 200 1:4 tr 1 (1) if input if output 4 limiter input 50 330 50 1.0 n v cc v cc 1.0 n 1.0 n 1.0 n 13 14 15 16 1.0 n 1.0 n 1.0 n 1.0 n 50 100 k 100 k 1.0 n 100 n 1.0 100 n 1.0 1.0 h 100 n 150 p (3) local oscillator input 140.7mhz 200m vrms carrier detect data slicer hold v ee a a a a a v ee v ee data output 19 ML13156 rssi output + notes: 1. tr 1 coilcraft 1:4 impedance transformer. 2. v cc is dc ground. 3. 1.5 h variable shielded inductor: toko part # 292sns?1373 or equivalent. sma v + 18 www.lansdale.com page 3 of 21 issue a
ML13156 lansdale semiconductor, inc. p in , input signal level (dbm) ?0 30 ?5 40 4.0 ?0 20.0 ?0 25.0 1.0 6.5 limiter amplifier rssi output current ( a) if amplifier gain (db) p in , if input signal level (dbm) i 19 drain currents (ma) v ee , supply voltage (?dc) if amplifier rssi current ( a) p in , if input signal level (dbm) mixer gain (db) p in , rf input signal level (dbm) figure 2. total drain current versus supply voltage and temperature figure 3. drain currents versus supply voltage figure 4. mixer gain versus input signal level figure 5. if amplifier gain versus input signal level and ambient temperature i total total drain current, figure 6. if amplifier rssi output current versus input signal level and ambient temperature v ee , supply voltage (?dc) figure 7. limiter amplifier rssi output current versus input signal level and temperature 6.0 5.5 5.0 4.5 4.0 3.5 2.0 3.0 4.0 5.0 6.0 7.0 55 c 25 c ?0 c ?0 c (ma) 3.6 3.2 2.8 2.4 2.0 1.6 i 22 1.0 2.0 3.0 4.0 5.0 6.0 7.0 i 22 , t a = 25 c 22.5 20.0 17.5 15.0 12.5 10.0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 38 36 34 32 30 28 26 ?0 ?5 ?0 ?5 ?0 ?5 ?0 17.5 15.0 12.5 10.0 7.5 5.0 2.5 0 ?0 ?0 ?0 ?0 0 10 5.0 0 ?0 ?0 ?0 ?0 ?0 ?0 0 10 25 20 15 10 t a = 85 c v ee = ?.0 vdc f = 10.7 mhz t a = 25 c i 19 ?0 c ?0 c 55 c 25 c ?0 c ?0 c 85 c t a = 25 to 85 c ?0 c v ee = ?.0 vdc f = 10.7 mhz ?0 c v ee = 5.0 vdc f = 10.7 mhz t a = 25 to 85 c www.lansdale.com page 4 of 21 issue a
lansdale semiconductor, inc. ML13156 v cc1 l o base o emitter v ee1 v cc2 im dec1 im dec2 lim in v ee2 4 24 23 22 9 11 12 10 19 1.0 k 1.0 k 1 2 rf in2 rf in1 330 3 mix output 5 7 6 if dec1 if dec2 if in 1.4 k 32 k 32 k 290 8 if out 400 20 rssi out 21 carrier detect output 28 17 16 18 64 k 64 k 64 k ds output ds gnd dshold ds in 15 16 k demod 14 13 quad coil 5.0 p local oscillator mixer if amplifier rssi carrier detect linear amplifier quadrature detector data slicer figure 8. figure 8. ML13156-6p internal circuit schematic www.lansdale.com page 5 of 21 issue a
ML13156 lansdale semiconductor, inc. general the ML13156 is a low power single conversion wideband fm receiver incorporating a split if. this device can be used as a single conversion receiver or as the backend in digital fm systems such as ct2 and wide band data links with data rates up to 500 kbaud. it contains a mixer, oscillator, signal strength meter drive, if amplifi- er, limiting if, quadrature detector and a data slicer with a hold function (refer to figure 8, simplified internal circuit schematic). current regulation temperature compensating voltage independent current regula- tors are used throughout. mixer the mixer is a double?alanced four quadrant multiplier and is designed to work up to 500 mhz. it can be used in differential or in single?nded mode by connecting the other input to the positive supply rail. figure 4 shows the mixer gain and saturated output response as a function of input signal drive. the circuit used to measure this is shown in figure 1. the linear gain of the mixer is approxi- mately 22 db. figure 9 shows the mixer gain versus the if out- put frequency with the local oscillator of 150 mhz at 100 mvms lo drive level. the rf frequency is swept. the sensitivi- ty of the if output of the mixer is shown in figure 10 for an rf input drive of 10 mvrms at 140 mhz and if at 10 mhz. the single?nded parallel equivalent input impedance of the mixer is rp ~ 1.0 k and cp ~ 4.0 pf (see table 1 for details). the buffered output of the mixer is internally loaded resulting in an output impedance of 330 . local oscillator the on?hip transistor operates with crystal and lc resonant elements up to 220 mhz. series resonant, overtone crystals are used to achieve excellent local oscillator stability. 3rd overtone crystals are used through about 65 to 70 mhz. operation from 70 mhz up to 180 mhz is feasible using the on?hip transistor with a 5th or 7th overtone crystal. to enhance operation using an overtone crystal, the internal transistors bias is increased by adding an external resistor from pin 23 to vee. ?0 dbm of local oscillator drive is needed to adequately drive the mixer (figure 10). the oscillator configurations specified above, and two others using an external transistor, are described in the application sec- tion: 1) a 133 mhz oscillator multiplier using a 3rd overtone crystal, and 2) a 307.8 to 309.3 mhz manually tuned, varactor controlled local oscillator. rssi the received signal strength indicator (rssi) output is a cur- rent proportional to the log of the received signal amplitude. the rssi current output is derived by summing the currents for the if and limiting amplifier stages. an external resistor at pin 20 sets the voltage range or swing of the rssi output voltage. linearity of the rssi is optimized by using external ceramic or crystal bandpass filters which have and insertion loss of 8.0 db. the rssi circuit is designed to provide 70+ db of dynamic range with temperature compensation (see figures 6 and 7 which show rssi responses of the if and limiter amplifiers). variation in the rssi output current with supply voltage is 5 ma total delta (see figure 11). carrier detect when the meter current flowing through the meter load resist- ance reaches 1.2 vdc above ground, the comparator flips, caus- ing the carrier detect output to go high. hysteresis can be accomplished by adding a very large resistor for positive feed- back between the output and the input of the comparator. if amplifier the first if amplifier section is composed of three differential stages with the second and third stages contributing to the rssi. this section has internal dc feedback and external input decou- pling for improved symmetry and stability. the total gain of the if amplifier block is approximately 39 db at 10.7 mhz. figure 5 shows the gain and saturated output response of the if ampli- fier over temperature, while figure 12 shows the if amplifier gain as a function of the if frequency. the fixed internal input impedance is 1.4k . it is designed for application where a 455 khz ceramic filter is used and no exter- nal output matching is necessary since the filter requires a 1.4 k source and load impedance. for 10.7 mhz ceramic filter applications, an external 430 resistor must be added in parallel to provide the equivalent load impedance of 330 that is required by the filter; however, no external matching is necessary at the input since the mixer out- put matches the 330 source impedance of the filter. for 455 khz applications, an external 1.1 k resistor must be added in series with the mixer output to obtain the required matching impedance of 1.4 k of the filter input resistance. overall rssi linearity is dependent on having total midband attenuation of 12 db (6.0 db insertion loss plus 6.0 db impedance matching loss) for the filter. the output of the if amplifier is buffered and the impedance is 290 . limiter the limiter section is similar to the if amplifier section except that four stages are used with the last three contributing to the rssi. the fixed internal input impedance is 1.4 k . the total gain of the limiting amplifier sections is approximately 55 db. this if limiting amplifier section internally drives the quadra- ture detector section. circuit description www.lansdale.com page 6 of 21 issue a
lansdale semiconductor, inc. ML13156 0.1 60 ?.0 1.0 40 0.1 20 if amplifier gain (db) f, frequency (mhz) mixer if output level (dbm) lo drive (dbm) v ee , supply voltage (?dc) figure 9. mixer gain versus if frequency figure 10. mixer if output level versus local oscillator input level mixer gain (db) figure 11. rssi output current versus supply voltage and rf input signal level f if , if frequency (mhz) figure 12. if amplifier gain versus if frequency 15 10 5.0 0 ?.0 1.0 10 100 ?0 ?5 ?0 ?5 ?0 ?5 v ee = ?.0 vdc t a = 25 c ?0 ?0 ?0 ?0 ?0 0 10 35 30 25 20 15 10 2.0 3.0 4.0 5.0 6.0 7.0 50 40 30 20 10 0 1.0 10 100 ?0 ?5 f rf = 140 mhz; f lo = 150 mhz rf input level = ?7 dbm (10 mvrms) r in = 50 ; r o = 330 ?0 dbm ?0 dbm ?0 dbm ?00 dbm 5.0 0 rssi output current ( a) i 20 , v in = 100 v r in = 50 r o = 330 bw(3.0 db) = 26.8 mhz t a = 25 c ?0 dbm 1.0 400 figure 13. recovered audio output voltage versus supply voltage v ee , supply voltage (?dc) f mod = 1.0 khz f dev = 75 khz f rf = 140 mhz rf input level = 1.0 mvrms t a = 25 c 300 200 100 0 2.0 3.0 4.0 5.0 6.0 7.0 recovered audio output (mvrms) v 14 , v in = v ee = ?.0 vdc v in = 1.0 mvrms (?7 dbm) r o = 330 r in = 50 bw(3.0 db) = 21.7 mhz f if = f lo ?f rf f lo = 150 mhz v lo = 100 mvrms t a = 25 c www.lansdale.com page 7 of 21 issue a
ML13156 lansdale semiconductor, inc. quadrature detector the quadrature detector is a doubly balanced four quadrant multiplier with an internal 5.0 pf quadrature capacitor to cou- ple the if signal to the external parallel rlc resonant circuit that provides the 90 degree phase shift and drives the quadra- ture detector. a single pin (pin 13) provides for the external lc parallel resonant network and the internal connection to the quadrature detector. the bandwidth of the detector allows for recovery of relative- ly high data rate modulation. the recovered signal is convert- ed from differential to single ended through a pushpull npn/pnp output stage. variation in recovered audio output voltage with supply voltage is very small (see figure 13). the output drive capability is approximately 9.0 a for a fre- quency deviation of 75 khz and 1.0 khz modulating fre- quency (see application circuit) data slicer the data slicer input (pin 15) is self centering around 1.1 v with clamping occurring at 1.1 0.5 v be vdc. it is designed to square up the data signal. figure 14 shows a detailed schematic of the data slicer. the voltage regulator sets up to 1.1 vdc on the base of q12, the differential input amplifier. there is a potential of 1.0 v be on the basecollector of transistor diode q11 and 2.0 v be on the basecollector of q10. this sets up a 1.5 v be (~1.1 vdc) on the node between the 36 k resistors which is connected to the base of q12. the differential output of the data slicer q12 and q13 is converted to a singleended out- put by the driver circuit. additional circuitry, not shown in figure 14, tends to keep the data slicer input centered at 1.1 vdc as input signal levels vary. the input diode clamp circuit provides the clamping at 1.0 v be (0.75 vdc) and 2.0 v be (1.45 vdc). transistor diodes q7 and q8 are on , thus, providing a 2.0 v be potential at the base of q1. also, the voltage regulator circuit provides a potential of 2.0 v be on the base of q3 and 1.0 v be on the emitter of q3 and q2. when the data slicer input (pin 15) is pulled up, q1 turns off; q2 turns on, thereby clamping the input at 2.0 v be . on the other hand, when pin 15 is pulled down, q1 turns on; q2 turns off, thereby clamping the input at 1.0 v be . the recovered data signal from the quadrature detector is ac coupled to the data slicer via an input coupling capacitor. the size of the capacitor and the nature of the data signal deter- mine how faithfully the data slicer shapes up the recovered signal. the time constant is short for large peak to peak volt- age swings or when there is a change in dc level at the detec- tor output. for small signal or for continuous bits of the same polarity which drift close to the threshold voltage, the time constant is longer. when centered there is no input current allowed, which is to say, that the input looks high in imped- ance. another unique feature of the data slicer is that it responds to various logic levels applied to the data slicer hold control pin (pin 18). figure 15 illustrates how the input and output currents under no hold condition relate to the input voltage. figure 16 shows how the input current and input voltage relate to the both the no hold and hold condition. the hold control (pin 18) does three separate tasks: 1) with pin 18 at 1.0 v be or greater, the output is shut off (sets high). q19 turns on which shunts the base drive from q20, thereby turning the output off. 2) with pin 18 at 2.0 v be or greater, internal clamping diodes are open circuited and the comparator input is shut off and effectively open circuited. this is accomplished by turning off the current source to emitters of the input differential amplifier, thus, the input differential amplifier is shut off. 3) when the input is shut off, it allows the input capacitor to hold its charge during transmit to improve recovery at the beginning of the next receive period. when it is turned on, it allows for very fast charging of the input capacitor for quick recovery of new tuning or data average. the above features are very desirable in a tdd digital fm system. www.lansdale.com page 8 of 21 issue a
lansdale semiconductor, inc. ML13156 figure 14. data slicer circuit 64 k 9 15 19 18 16 17 v cc v ee 64 k 64 k 16 k 16 k 32 k 36 k 36 k 8.0 k 8.0 k q10 q8 q17 q18 q19 q16 q20 q12 q13 q4 q9 q11 q2 q1 q3 q5 q7 q6 q14 q15 ds gnd ds hold data out ds in input diode clamp circuit (q1 to q9) voltage regulator (q10, q11) differential input amplifier (q12, q13) driver and output circuit (q14, q20) 150 0.6 0.5 v 15 , input voltage (vdc) figure 15. data slicer input/output currents versus input voltage v 15 , input voltage (vdc) figure 16. data slicer input current versus input voltage v ee = ?.0 vdc v 18 = 0 vdc (no hold) 0.3 0.1 ?.1 ?.3 ?.5 0.8 1.0 1.2 100 50 0 ?0 ?00 v ee = ?.0 vdc ?.0 ?.5 0 0.5 1.0 1.5 2.0 no hold v 18 = 0 vdc 1.4 1.6 1.8 2.5 1.5 0.5 ?.5 ?.5 ?.5 output current (i 17 ) input current (ma) i 15 , output current (ma) i 17 , hold v 18 1 input current ( a) i 15 , 2.5 3.0 no hold hold input current (i 15 ) legacy applications information www.lansdale.com page 9 of 21 issue a
ML13156 lansdale semiconductor, inc. figure 17. mc13156dw application circuit 1.5 150 p (3) notes: 1. 0.1 h variable shielded inductor: coilcraft part # m1283? or equivalent. 2. 10.7 mhz ceramic filter: toko part # sk107m5?0?0x or murata erie part # sfe10.7mhy?. 3. 1.5 h variable shielded inductor: toko part # 292sns?1373. 4. 3rd overtone, series resonant, 25 ppm crystal at 44.585 mhz. 5. 0.814 h variable shielded inductor: coilcraft part # 143?8j12s. 6. 0.146 h variable inductor: coilcraft part # 146?4j08. data slicer hold 430 + + data output rssi output carrier detect 133.755 mhz osc/tripler 50 p 7.5 p 144.455 mhz rf input v cc v cc 1.0 430 47 k 470 5.6 k 15 k 100 p 1.0 0.146 (6) sma (2) 10.7 mhz ceramic filter (2) 10.7 mhz ceramic filter 10 n 10 n 10 n 10 n 10 n (1) 0.1 100 k 10 k 100 k 68 p 43 p 10 n 100 k 10 n 10 n 10 k 100 n 180 p mmbr5179 (4) 3rd o.t. xtal 1.0 k (5) 0.82 11 20 22 17 24 12 10 9 8 7 6 3 bias 5.0 p data slicer lim amp if amp bias 23 21 1 5 mixer v ee 4 v cc v cc 14 15 16 v ee v ee 19 ML13156 18 2 13 legacy applications information www.lansdale.com page 10 of 21 issue a
lansdale semiconductor, inc. ML13156 legacy applications information www.lansdale.com page 11 of 21 issue a
lansdale semiconductor, inc. ML13156 table 1. mixer input impedance data (single?nded configuration, v cc = 3.0 vdc, local oscillator drive = 100 mvrms) frequency (mhz) series equivalent complex impedance (r + jx) ( ) parallel resistance rp ( ) parallel capacitance cp ( pf ) 90 190 ?j380 950 4.7 100 160 ?j360 970 4.4 110 130 ?j340 1020 4.2 120 110 ?j320 1040 4.2 130 97 ?j300 1030 4.0 140 82 ?j280 1040 4.0 150 71 ?j270 1100 4.0 160 59 ?j260 1200 3.9 170 52 ?j240 1160 3.9 180 44 ?j230 1250 3.8 190 38 ?j220 1300 3.8 component selection the evaluation pc board is designed to accommodate specific components, while also being versatile enough to use components from various manufacturers and coil types. figures 18 and 19 show the placement for the components specified in the application cir- cuit (figure 17). the application circuit schematic specifies particu- lar components that were used to achieve the results shown in the typical curves and tables but equivalent components should give similar results. input matching networks.components the input matching circuit shown in the application circuit schematic is passive high pass network which offers effective image rejection when the local oscillator is below the rf input frequency. silver mica capacitors are used for their high q and tight tolerance. the pc board is not dedicated to any particular input matching net- work topology; space is provided for the designer to breadboard as desired. alternate matching networks using 4:1 surface mount transformers or baluns provide satisfactory performance. the 12 db sinad sensitivity using the above matching networks is typically 100 dbm for f mod = 1.0 khz and f dev = 75 khz at f in = 144.45 mhz and f osc = 133.75 mhz (see figure 23). it is desirable to use a saw filter before the mixer to provide addi- tional selectivity and adjacent channel rejection and improved sen- sitivity. the saw filter should be designed to interface with the mixer input impedance of approximately 1.0 k . table 1 displays the series equivalent singleended mixer input impedance. local oscillators vhf applications ? the local oscillator circuit shown in the application schematic utilizes a third overtone crystal and an rf transistor. selecting a transistor having good phase noise perform- ance is important; a mandatory criteria is for the device to have good linearity of beta over several decades of collector current. in other words, if the low current beta is suppressed, it will not offer good 1/f noise performance. a third overtone series resonant crystal having at least 25 ppm tolerance over the operating temperature is recommended. the local oscillator is an impedance inversion third overtone colpitts network and harmonic generator. in this circuit a 560 to 1.0 k resistor shunts the crystal to ensure that it operates in its overtone mode; thus, a blocking capacitor is needed to eliminate the dc path to ground. the resulting parallel lc network should freerun near the crystal frequency if a short to ground is placed across the crystal. to provide sufficient output loading at the collec- tor, a high q variable inductor is used that is tuned to self resonate at the 3rd harmonic of the overtone crystal frequency. the onchip grounded collector transistor may be used for hf and vhf local oscillator with higher order overtone crystals. figure 18 shows a 5th overtone oscillator at 93.3 mhz and figure 19 shows a 7th overtone oscillator at 148.3 mhz. both circuits use a butler overtone oscillator configuration. the amplifier is an emitter fol- lower. the crystal is driven from the emitter and is coupled to the high impedance base through a capacitive tap network. operation at the desired overtone frequency is ensured by the parallel resonant circuit formed by the variable inductor and the tap transistor and pc board. the variable inductor specified in the schematic could be replaced with a high tolerance, high q ceramic or air wound sur- face mount component. if the other component have good toler- ance. a variable inductor provides an adjustment for gain and fre- quency of the resonant tank ensuring lock up and start up of the crystal oscillator. the overtone crystal is chosen with esr of typi- cally 80 and 120 maximum; if the resistive loss in the crystal is too high, the performance of the oscillator may be impacted by lower gain margins. legacy applications information www.lansdale.com page 12 of 21 issue a
lansdale semiconductor, inc. ML13156 legacy applications information www.lansdale.com page 13 of 21 issue a
ML13156 lansdale semiconductor, inc. figure 18. mc13156dw application circuit f rf = 104 mhz; f lo = 93.30 mhz 5th overtone crystal oscillator notes: 1. 0.1 h variable shielded inductor: coilcraft part # m1283? or equivalent. 2. capacitors are silver mica. 3. 5th overtone, series resonant, 25 ppm crystal at 93.300 mhz. 4. 0.135 h variable shielded inductor: coilcraft part # 146?5j08s or equivalent. 5th ot xtal + to filter 120 p (2) 10 p rf input 1.0 sma 10 n (1) 0.1 27 p 30 p 4.7 k (4) 0.135 h 22 24 3 23 1 mixer v ee 2 v cc 10 n 1.0 h 33 104 mhz 3.0 p (3) a series lc network to ground (which is v cc ) is comprised of the inductance of the base lead of the onchip transistor and pc board traces and tap capacitors. parasitic oscillations often occur in the 200 to 800 mhz range. a small resistor is placed in series with the base (pin 24) to cancel the negative resistance associated with this undesired mode of oscillation. since the base input impedance is so large a small resistor in the range of 27 to 68 has very little effect on the desired butler mode of oscillation. the crystal parallel capacitance, c o , provides a feedback path that is low enough in reactance at frequencies of 5th overtone or higher to cause trouble. c o has little effect near resonance because of the low impedance of the crystal motional arm (r m ? m ? m ). as the tunable inductor which forms the resonant tank with the tap capaci- tors is tuned off the crystal resonant frequency, it may be difficult to tell if the oscillation is under crystal control. frequency jumps may occur as the inductor is tuned. in order to eliminate this behav- ior an inductor (l o ) is placed in parallel with the crystal. l o is cho- sen to resonant with the crystal parallel capacitance (c o ) at the desired operation frequency. the inductor provides a feedback path at frequencies well below resonance; however, the parallel tank net- work of the tap capacitors and tunable inductor prevent oscillation at these frequencies. uhf application figure 20 shows a 318.5 to 320 mhz receiver which drives the mixer with an external varactor controlled (307.8 to 309.3 mhz) lc oscillator using an mps901 (rf low power transistor in a to92 plastic package; also mmbr901 is available in a sot23 surface mount package). with the 50 k 10 turn potentiomenter this oscillator is tunable over a range of approximately 1.5 mhz. the mmbv909l is a low voltage varactor suitable for uhf appli- cations; it is a dual backtoback varactor in a sot23 package. the input matching network uses a 1:4 impedance matching trans- former (recommended sources are minicircuits and coilcraft). using the same if ceramic filters and quadrature detector circuit as specified in the applications circuit in figure 17, the 12 db sinad performance is 95 dbm for a f mod = 1.0 khz sinusoidal wave- form and f dev 40 khz. this circuit is breadboarded using the evaluation pc bard shown in figures 32 and 33. the rf ground is v cc and path lengths are minimized. high quality surface mount components were used except where specified. the absolute values of the components used will vary with layout placement and component parasitics. rssi response figure 24 shows the full rssi response in the application circuit. the 10.7 mhz, 110 khz wide bandpass ceramic filters (recom- mended sources are toko part # sk107m5ao10x or murata erie sfe10.7mhya) provide the correct band pass insertion loss to linearize the curve between the limiter and if portions of rssi. figure 23 shows that limiting occurs at an input of 100 dbm. as shown in figure 24, the rssi output linear from 100 dbm to 30 dbm. the rssi rise and fall times for various rf input signal levels and r20 values are measures at pin 20 without 10 nf filter capacitor. a 10 khz square wave pulses the rf input signal on and off. figure 25 shows that the rise and fall times are short enough to recover greater than 10 khz ask data; with a wider if band pass filters data rates up to 50 khz may be achieved. the circuit used is the application circuit in figure 17 with no rssi output filter capacitor. legacy applications information www.lansdale.com page 14 of 21 issue a
lansdale semiconductor, inc. ML13156 figure 19. mc13156dw application circuit f rf = 159 mhz; f lo = 148.30 mhz 7th overtone crystal oscillator notes: 1. 0.08 h variable shielded inductor: toko part # 292sns?1365z or equivalent. 2. capacitors are silver mica. 3. 7th overtone, series resonant, 25 ppm crystal at 148.300 mhz. 4. 76 nh variable shielded inductor: coilcraft part # 150 03j08s or equivalent. 7th ot xtal to if filter 50 p (2) 5.0 p rf input sma 10 n (1) 0.08 h 27 p 47 p 4.7 k (4) 76 nh 22 24 3 23 1 mixer v ee 2 v cc 10 n 0.22 h 33 figure 20. mc13156dw varactor controlled lc oscillator notes: 1. 1:4 impedance transformer: mini circuits. 2. 50 k potentiometer, 10 turns. 3. spring coil; coilcraft a05t. 4. dual varactor in sot?3 package. 5. all other components are surface mount components. 6. ferrite beads through loop of 24 awg wire. 12 k 307.8?09.3 mhz lc varactor controlled oscillator mps901 4.7 k 1.0 n 318.5 to 320 mhz sma 1.8 k 22 24 3 23 1 mixer v ee 2 20 p 24 p v cc = 3.3 vdc (reg) + 1.0 rf input (1) 1:4 transformer 24 p 6.8 p v vco (2) 50 k 47 k (4) mmbv909l 470 + 1.0 0.1 1.0 m 159 mhz (6) (3) 18.5 nh (3) legacy applications information www.lansdale.com page 15 of 21 issue a
ML13156 lansdale semiconductor, inc. figure 21. mc13156dw application circuit at 45 mhz notes: 1. 0.33 h variable shielded inductor: coilcraft part # 7m3?31 or equivalent. 2. 455 khz ceramic filter: murata erie part # sfg455a3. 3. 455 khz quadrature tank: toko part # 7mc8128z. 4. 3rd overtone, series resonant, 25 ppm crystal at 44.540 mhz. 5. 0.416 h variable shielded inductor: coilcraft part # 143?0j12s. 6. 1.8 h molded inductor. 680 h 180 p (3) data slicer hold + + data output rssi output carrier detect 1.2 k 33 p 45 hz rf input v cc v cc = 2.0 to 5.0 vdc 1.0 47 k 56 p 10 n 1.0 sma (2) 455 khz ceramic filter (2) 455 khz ceramic filter 0.1 10 n (1) 0.33 h 100 k 27 k 100 k 100 k 10 n 10 n 10 k 100 n (4) 3rd ot xtal 470 k 1.8 h 11 20 22 17 24 12 10 9 8 7 6 3 bias 5.0 p data slicer lim amp if amp bias 21 1 5 mixer v ee 4 v cc v cc 14 15 16 v ee v ee 19 18 2 13 0.1 180 p 1.2 k 0.1 0.1 1.0 n audio to c?essage filter and amp. 39 p 10 k 23 10 n 44.545 mhz (5) 0.416 h (6) 45 mhz narrowband receiver the above application examples utilize a 10.7 mhz if. in this sec- tion a narrowband receiver with a 455 khz if will be described. figure 21 shows a full schematic of a 45 mhz reciever that uses a 3rd overtone crystal with the onchip oscillator transistor. the oscillator configuration is similar to the one used in figure 17; it is called an impedance inversion colpitts. a 44.545 mhz 3rd over- tone, series resonant crystal is used to achieve an if frequency at 455 khz. the ceramic if filters selected are murata erie part # sfg455a3. 1.2 k chip resistors are used in series with the filters to achieve the terminating resistance of 1.4 k to the filter. the if decoupling is very important; 0.1 f chip capacitors are used at pins 6, 7, 11 and 12. the quadrature detector tank circuit uses a 455 khz quadrature tank from toko. the 12 db sinad performance is 109 dbm for a f mod = 1.0 khz and a f dev = 4.0 khz. the rssi dynamic range is approximately 80 db of linear range (see figure 22). receiver design considerations the curves of signal levels at various portions of the application receiver with respect to rf input level are shown in figure 26. this information helps determine the network topology and gain blocks required ahead of the mc13156 to achieve the desired sensitivity and dynamic range of the receiver system. in the application circuit the input third order intercept (ip3) performance of the system is approximately 25 dbm (see figure 27). legacy applications information www.lansdale.com page 16 of 21 issue a
ML13156 lansdale semiconductor, inc. ?00 10 s + n, n (db) rf input signal (dbm) v cc = 5.0 vdc f dev = 75 khz f mod = 1.0 khz f in = 144.45 mhz (see figure 17) 0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?10 s+n n t r @ 22 k t f @ 22 k t r @ 47 k t f @ 47 k t r @ 100 k t f @ 100 k ?20 1.8 rssi output voltage (vdc) figure 22. rssi output voltage versus input signal level signal input level (dbm) 1.6 1.4 1.2 1.0 0.8 ?00 ?0 0.4 ?0 ?0 20 1.4 rssi output voltage (vdc) signal input level (dbm) figure 23. s + n/n versus rf input signal level 1.2 1.0 0.8 0.6 0.4 0.2 ?20 ?00 ?0 ?0 ?0 ?0 0 v cc = 5.0 vdc f c = 144.455 mhz f lo = 133.755 mhz low loss 10.7 mhz ceramic filter (see figure 17) f rf = 45.00 mhz v cc = 2.0 vdc 12 db sinad @ ?09 dbm (0.8 vrms) (see figure 21) 35 t , , figure 24. rssi output voltage versus input signal level rf input signal level (dbm) 30 25 20 15 10 0 ?0 0 ?0 ?0 ?0 0.6 ?0 0 5.0 rf figure 25. rssi output rise and fall times versus rf input signal level rssi rise and fall times ( s) t ?00 10 ?00 0 mixer if output level (dbm) rf input power (dbm) rf input signal level (dbm) figure 26. signal levels versus rf input signal level figure 27. 1.0 db compression pt. and input third order intercept pt. versus input power ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 if output limiter input ?0 power (dbm) ?0 lo level = ?.0 dbm (see figure 17) ?0 ?0 ?0 0 1.0 db comp. pt. = ?7 dbm v cc = 5.0 vdc f rf1 = 144.4 mhz f rf2 = 144.5 mhz f lo = 133.75 mhz p lo = ?.0 dbm (see figure 17) ip3 = ?5 dbm legacy applications information www.lansdale.com page 17 of 21 issue a
description the test setup shown in figure 29 is configured so that the function generator supplies a 100 khz clock source to the bit error rate tester. this device generates and receives a repeating data pattern and drives a 5 pole baseband data filter. the filter effectively reduces harmonic content of the base band data which is used to modulate the rf generator which is running at 144.45 mhz. following processing of the signal by the receiver (ML13156), the recovered baseband sinewave (data) is ac coupled to the data slicer. the data slicer is essentially an autothreshold comparator which tracks the zero crossing of the incoming sinewave and pro- vides logic level data at its output. data errors associated with the recovered data are collected by the bit error rate receiver and dis- played. bit error rate versus rf signal input level and if filter bandwidth are shown in figure 28. the bit error rate data was taken under the following test conditions: data rate = 100kbps filter cutoff frequency set to 39% of the data rate or 39 khz. filter type is a 5 pole equalripple with 0.5 phase error. v cc = 4.0 vdc frequency deviation = 32 khz. evaluation pc board the evaluation pcb is very versatile and is intended to be used across the entire useful frequency range of this device. the center section of the board provides an area for attaching all smt compo- nents to the component ground side (see figures 32 and 33). additionally, the peripheral area surrounding the rf core provides pads to add supporting and interface circuitry as a particular appli- cation dictates ML13156 lansdale semiconductor, inc. ber testing and perormance ?0 figure 28. bit error rate versus rf input signal level and if bandpass filter rf input signal level (dbm) ?5 80 ?5 70 ber, bit error rate 10 ? 10 ? 10 ? 10 ? if filter bw 110 khz if filter bw 230 khz v cc = 4.0 vdc data pattern = 2e09 prbs nrz baseband filter f c = 50 khz f dev = 32 khz www.lansdale.com page 18 of 21 issue a
ML13156 lansdale semiconductor, inc. figure 29. bit error rate test setup function generator clock out gen clock input rcr clock input rcr data input generator output bit error rate tester rf generator modulation input rf output 5 pole bandpass filter mc13156 uut data slicer output mixer input wavetek model no. 164 hp3780a or equivalent hp8640b legacy applications information www.lansdale.com page 19 of 21 issue a
ML13156 lansdale semiconductor, inc. (ML13156-8p) plastic qfp package case 873?1 issue a outline dimensions notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. datum plane ??is located at bottom of lead and is coincident with the lead where the lead exits the plastic body at the bottom of the parting line. 4. datums ?? ??and ??to be determined at datum plane ?? 5. dimensions s and v to be determined at seating plane ?? 6. dimensions a and b do not include mold protrusion. allowable protrusion is 0.25 (0.010) per side. dimensions a and b do include mold mismatch and are determined at datum plane ?? 7. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the d dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. u b l detail a l ? 32 25 24 16 17 18 9 v s a? m 0.20 (0.008) d s c s a? m 0.20 (0.008) d s h a? 0.05 (0.002) s a? m 0.20 (0.008) d s c a? 0.05 (0.002) s a? m 0.20 (0.008) d s h ? a s ? ? seating plane ? datum plane m g detail c m h c e 0.01 (0.004) ? datum plane t detail c r k q x detail a b b p ?? ?? ? s a? m 0.20 (0.008) d s c j f n d section b? base metal view rotated 90 clockwise dim min max min max inches millimeters a 6.95 0.274 0.280 b 6.95 7.10 0.274 0.280 c 1.40 1.60 0.055 0.063 d 0.273 0.373 0.010 0.015 e 1.30 1.50 0.051 0.059 f 0.273 0.010 g 0.80 bsc 0.031 bsc h 0.20 0.008 j 0.119 0.197 0.005 0.008 k 0.33 0.57 0.013 0.022 l 5.6 ref 0.220 ref m 6 8 6 8 n 0.119 0.135 0.005 0.005 p 0.40 bsc 0.016 bsc q 5 10 5 10 r 0.15 0.25 0.006 0.010 s 8.85 9.15 0.348 0.360 t 0.15 0.25 0.006 0.010 u 5 11 5 11 v 8.85 9.15 0.348 0.360 x 1.00 ref 0.039 ref 7.10 www.lansdale.com page 20 of 21 issue a
ML13156 lansdale semiconductor, inc. (ML13156-6p) plastic package case 751e?4 (so?4l) issue e outline dimensions notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.13 (0.005) total in excess of d dimension at maximum material condition. ? ? p 12x d 24x 12 13 24 1 m 0.010 (0.25) b m s a m 0.010 (0.25) b s t ? g 22x seating plane k c r x 45 m f j dim min max min max inches millimeters a 15.25 15.54 0.601 0.612 b 7.40 7.60 0.292 0.299 c 2.35 2.65 0.093 0.104 d 0.35 0.49 0.014 0.019 f 0.41 0.90 0.016 0.035 g 1.27 bsc 0.050 bsc j 0.23 0.32 0.009 0.013 k 0.13 0.29 0.005 0.011 m 0 8 0 8 p 10.05 10.55 0.395 0.415 r 0.25 0.75 0.010 0.029 lansdale semiconductor reserves the right to make changes without further notice to any products herein to improve reliabili- ty, function or design. lansdale does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. ?ypical parameters which may be provided in lansdale data sheets and/or specifications can vary in different applications, and actual performance may vary over time. all operating parameters, including ?ypicals must be validated for each customer application by the customers technical experts. lansdale semiconductor is a registered trademark of lansdale semiconductor, inc. www.lansdale.com page 21 of 21 issue a


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